1. Technical Field
The present disclosure relates to an electronic circuit unit provided with a multi-layer substrate in which high frequency circuits are provided on two different layers and a ground layer is formed between the two layers. More particularly, the present disclosure relates to an improvement of a grounding land provided in a multi-layer substrate.
2. Related Art
In an electronic circuit unit in which high frequency circuits are provided on two different layers (e.g., upper and lower outer layers) in a multi-layer substrate, a large ground layer (a ground conductive layer) formed between these two layers is electrically connected to grounding lands, which are provided on each layer, through a via hole formed through layers. In this type of electronic circuit unit, when the grounding lands are formed at the approximate center thereof with a mounting hole, grounding terminals and the like of electrical parts are inserted into the mounting hole so as to be soldered to the grounding lands. Further, conductive balls connected to grounding terminals and the like of chip parts are mounted on the grounding lands so as to be soldered thereto.
However, when the terminals of electrical parts and the conductive balls are soldered to the grounding lands formed on the outer layers of the multi-layer substrate, cream solder on the grounding lands is molten by heating. When the grounding lands are formed as an exposure portion of an electrode surrounded by solder resist covering a peripheral portion of the electrode, it may be difficult to efficiently heat the cream solder on the grounding lands. That is, after the cream solder is coated on the grounding lands formed as described above, since heat supplied to the grounding lands may be easily transferred to the peripheral portion of the electrode and the inner ground layer in a process of heating and melting the cream solder in a reflow furnace and the like, the cream solder may not be sufficiently molten, resulting in soldering defects.
In this regard, according to the related art, a pattern shape is employed in which each grounding land is connected to a peripheral conductive member (an annular electrode and the like) through a connection bar with a narrow width radially protruding around the grounding land (for example, refer to Japanese Unexamined Patent Application Publication No. 2003-243813). The grounding land with the connection bar protruding as described above is referred to as a thermal land, and dissipation of heat supplied to the grounding land can be suppressed because the heat is not easily leaked through the connections bar with a narrow width. Further, in the case in which the grounding lands of the outer layer and the inner layer of the multi-layer substrate are formed as the thermal lands, in the outer layer, heat is not easily transferred from the grounding lands coated with the cream solder to the peripheral annular electrodes through the connections bars, and a desired peel strength can be ensured for the grounding lands by covering the annular electrodes with solder resist. In addition, the heat is transferred from the grounding land of the outer layer to the grounding land of the inner layer through the via hole, but leakage of the heat can be suppressed because the heat is transferred to the ground layer and the like through the connection bar in the inner layer. Thus, even if the grounding land of the outer layer is conducted to the large ground layer of the inner layer, the cream solder coated on the grounding land of the outer layer can be efficiently heated in the reflow furnace and the like.
However, for example, in an electronic circuit unit provided with a multi-layer substrate 20 as shown in FIG. 3, if a grounding land 23 of each layer is formed as a thermal land with protruding connection bars 23a as shown in FIG. 4, openings 24 partitioned by the connection bars 23a in the circumferential direction are formed around the grounding land 23 of each layer. Further, since a high frequency signal may easily pass through between layers in an area in which all openings 24 of each layer overlap each other along the thickness direction (interlayer direction) in the multi-layer substrate 20, when high frequency circuits 21 and 22 are provided on two different layers (the uppermost layer and the undermost layer in FIG. 3) of the multi-layer substrate 20, isolation between the high frequency circuits 21 and 22 is reduced, resulting in an increase in noise intrusion. In FIG. 3, a reference numeral 25 indicates a ground layer, a reference numeral 26 indicates annular electrodes, a reference numeral 27 indicates wiring patterns, a reference numeral 28 indicates a via hole and a reference numeral 29 indicates insulating layers, and solder resist, electrical parts and the like are omitted.